ISL97636AIRZ【PDF 12/18 页】IC LED DRIVR WHITE BCKLGT 24-QFN

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ISL97636A

Some users employ some special types of LEDs that have

zener diode structure in parallel with the LED for ESD

enhancement and enabling open circuit operation. When

this type of LED is open circuited, the effect is as if the LED

forward voltage has increased but no lighting. Any affected

string will not be disabled, unless the failure results in the

boost OVP limit being reached, allowing all other LEDs in the

string to remain functional. Care should be taken in this case

that the boost OVP limit and SCP limit are set properly, so as

to make sure that multiple failures on one string do not

cause all other good channels to be faulted out. This is due

to the increased forward voltage of the faulty channel making

all other channels look as if they have LED shorts. See

Table 1 for details regarding responses to fault conditions.

Overvoltage Protection (OVP)

The integrated OVP circuit monitors the output voltage and

keeps the voltage at a safe level. The OVP threshold is set

as:

off. This monitoring happens on a cycle-by-cycle basis in a

self protecting way.

Additionally, the ISL97636A monitors the voltage at the LX

and OVP pins. At start-up, a fixed current is injected out of

the LX pins and into the output capacitor. The device will not

start-up unless the voltage at LX exceeds 1.2V. Furthermore,

should the voltage at LX not rise above this threshold during

any subsequent period where the power FET is not switched

on, it will immediately disable the input protection FET. The

OVP pin is also monitored such that if it rises above and

subsequently falls below 20% of the target OVP level, the

input protection FET will also be switched off.

Over-Temperature Protection (OTP)

The ISL97636A includes two over-temperature thresholds. The

lower threshold is set to +130°C. When this threshold is

reached, any channel which is outputting current at a level

significantly below the regulation target will be treated as “open

circuit” and disabled after a time-out period. This time-out

OVP = 1.21V × ( R UPPER + R LOWER ) ? R LOWER

(EQ. 4)

period is also reduced to 800μs when it is above the lower

threshold. The intention of the lower threshold is to allow bad

These resistors should be large to minimize the power loss.

For example, a 1M Ω R UPPER and 39k Ω R LOWER sets OVP

to 32.2V. Large OVP resistors also allow C OUT discharges

slowly during the PWM off time.

Undervoltage Lockout

If the input voltage falls below the UVLO level of 2.45V, the

device will stop switching and reset. Operation will restart

when the voltage comes back into the operating range.

Input Overcurrent Protection

During normal switching operation, the current through the

internal boost power FET is monitored. If the current

exceeds the current limit, the internal switch will be turned

12

channels to be isolated and disabled before they cause enough

power dissipation (as a result of other channels having large

voltages across them) to hit the upper temperature threshold.

The upper threshold is set to +150°C. Each time this is

reached, the boost will stop switching and the output current

sources will be switched off. Once the device has cooled to

approximately +100°C, the device will restart with the DC

LED current level reduced to 77% of the initial setting. If the

dissipation problem persists, subsequent hitting of the limit

will cause identical behavior, with the current reduced in

steps to 53% and finally 30%. Unless disabled via the EN

pin, the device stays in an active state throughout.

For the extensive fault protection conditions, please refer to

Figure 18 and Table 1 for details.

FN6566.0

May 9, 2008

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